所在地:上海上海市 入职年份: 资料待完善 学历: 硕士 毕业院校: 资料待完善
从事领域 资料待完善
擅长能力 FPGA结构与应用加速,集成电路设计与EDA算法,可重构计算,量子计算
系别:微电子研究院职称:职务:办公室:复旦大学张江校区微电子楼381室 教育背景浙江大学物理系本科学生并留校工作浙江大学电子工程系硕士研究生英国爱丁堡Napier大学工程学院博士研究生研究方向课程教学大二本科生必修课程:“计算机软件基础”大三本科生选修课程:“FPGA结构原理和应用”研究生选修课程:“系统级可编程逻辑芯片设计”学术兼职IEEE/IETICALIP(音频、语言与图像处理国际会议)InternationalProgramCommitteemember,SessionChairof“SoftwareandHardwareImplementation:FPGAs”and“System-On-Chip”,2008The7thINTERNATIONALCONFERENCEONASIC(ASICON2007),“VLSIdesign”SessionChair,Shanghai,China,October26-29,2007The6thINTERNATIONALCONFERENCEONASIC(ASICON2005),“VLSIdesign”SessionChair,Shanghai,China,October24-27,2005指导学生参加"Altera杯"中国第五届研究生EDA电子设计竞赛,获团体金奖,清华大学,2005第14届VLSI(超大规模集成电路)设计国际会议评审员(14thInternationalConferenceonVLSIDesign,IEEEComputerSociety,LosAlamitos,California,U.S.A,2001)。科研项目美国Synopsys公司:FPGA芯片设计和软件系统智锐电子系统设计(上海)有限公司:面向可重构计算的FPGA软件算法开发,负责人国家自然科学基金面上项目:量子计算电路的设计和综合,负责人国防预先研究项目:自主FPGA技术开发研究复旦青年科学基金:深亚微米FPGA的低功耗研究,负责人国家大学生创新训练计划二类项目:FPGA时序收敛和码点调试工具,指导老师教育部留学回国人员科研启动基金:量子计算电路的设计和优化,负责人上海市浦江人才项目:抗辐射FPGA硬件电路与软件优化算法研究上海市“科技创新行动计划”集成电路设计专项:国产自主知识产权FPGA的产业化应用和深入研发论文著作1.IEEEAsiaPacificConferenceonCircuitsandSystems,Singapore,FastConversionforLargeCanonicalOR-CoincidenceFunctions,,,1645-16482.计算机工程与应用,扩展Toffoli门及其在多输出电路设计中的应用,,Vol.45,No.2,88-913.电子与信息学报,FPGA通用开关盒层次化建模与优化,,第30卷,第5期,1239-12424.计算机工程,一种FPGA配置文件压缩算法,,Vol.34,No.11,260-2625.InternationalConferenceonSolid-StateandIntegratedCircuitTechnology,FrameworkofConvertingC++ClasstoHardware,,,1823-18266.Integration,theVLSIJournal,TechniquesforDualFormsofReedMullerExpansionConversion,,Vol.41,No.1,113-1227.电子与信息学报,基于概率增益的电路划分算法,,Vol.29,No.11,2762-27668.计算机辅助设计与图形学学报,基于布通率的FPGA装箱算法,,Vol.19,No.1,108-1139.The49thIEEEInternationalMidwestSymposiumonCircuitsandSystems(MWSCAS),ADelayModelforSRAM-BasedFPGAInterconnections,,,10.JournaloftheKoreanPhysicalSociety,AnalyticInvestigationonThresholdVoltageofFully-depletedSurrounding-GateMetal-Oxide-SemiconductorField-Effect-Transistors,,Vol.52,No.6,1909-191211.11thIEEEInternationalConferenceTechnologyProceedings,SearchforthebestPolarityofFixedPolarityReedMullerExpressionbaseonQGA,,,343-34612.InternationalSymposiumonIntelligentInformationTechnologyApplication,Zero-hardenedSRAMCellstoImproveSoftErrorToleranceinFPGA,,,278-28113.InternationalSymposiumonIntelligentInformationTechnologyApplication,Searchforthebestpolarityofmulti-outputRMcircuitsbaseonQGA,,,279-28214.InternationalConferenceonSolid-StateandIntegratedCircuitTechnology,FPGAInterconnectTestingAlgorithmBasedonRouting-ResourceGraph,,,2087-209015.InternationalConferenceonSolid-StateandIntegratedCircuitTechnology,ExtendedToffoligateimplementationwithphotons,,,575-57816.InternationalConferenceonSolid-StateandIntegratedCircuitTechnology,ANovelPackingAlgorithmforSparseCrossbarFPGAArchitectures,,,2345-234817.InternationalConferenceonSolid-StateandIntegratedCircuitTechnology,EfficientRMconversionalgorithmforlargemultipleoutputfunctions,,,2300-230318.JapaneseJournalofAppliedPhysics,TheoryofShort-ChannelSurrounding-GateMetalOxideSemiconductorField-Effect-Transistors,,Vol.46,No.4A,1437-144019.8thInternationalConferenceonSolid-StateandIntegrated-CircuitTechnology(ICSICT),shanghai,FPGARoutingArchitectureOptimization,,,1934-193620.8thInternationalConferenceonSolid-StateandIntegrated-CircuitTechnology,Shanghai,MethodologyoftheDesignforSegments-SwitchableSwitchBlocks,,,1944-194621.8thInternationalConferenceonSolid-StateandIntegrated-CircuitTechnology(ICSICT),shanghai,AnInnovativeEmbeddedLogicAnalyzerBasedSoCVerificationPlatform,,,1876-187922.IEEProceedingsComputersandDigitalTechniques,MultilevelLogicSimplificationBasedonContainmentRecursiveParadigm,,Vol.150,No.4,218-22623.IEEProceedingsComputersandDigitalTechniques,ExactMinimisationofLargeMultipleOutputFPRMFunctions,,Vol.149,No.5,203-21224.IEEProceedingsCircuits,DevicesandSystems,OptimisationofReed-MullerPLAImplementations,,Vol.149,No.2,119-12825.IEEProceedingsCircuits,DevicesandSystems,Multi-CodeStateAssignmentforLowPowerSequentialCircuitDesign,,Vol.147,No.5,271-275获奖情况2007.01----获教育部科技进步二等奖“适用于数据通路应用的可编程逻辑器件及其软件系统”(第三完成人)